|
|
Items |
DDR3 SDRAM |
DDR2 SDRAM |
DDR SDRAM |
|
Clock frequency |
400/533/667MHz |
200/266/333/400MHz |
100/133/166/200MHz |
|
Transfer data rate |
800/1066/1333Mbps |
400/533/667/800Mbps |
200/266/333/400Mbps |
|
I/O width |
x4/x8/x16 |
x4/x8/x16 |
x4/x8/x16/x32 |
|
Prefetch bit width |
8-bits |
4-bits |
2-bits |
|
Clock input |
Differential clock |
Differential clock |
Differential clock |
|
Burst length |
4 (Burst chop), 8 |
4, 8 |
2, 4, 8 |
|
Data strobe |
Differential data strobe |
Differential data strobe |
Single data strobe |
|
Supply voltage |
1.5V |
1.8V |
2.5V |
|
Interface |
SSTL_15 |
SSTL_18 |
SSTL_2 |
|
/CAS latency (CL) |
5, 6, 7, 8, 9, 10 clock |
3, 4, 5 clock |
2, 2.5, 3 clock |
|
On die termination (ODT) |
Support |
Support |
Unupported |
|
Component package |
FBGA |
FBGA |
TSOP(II) / FBGA / LQFP |
|
Lead-free |
Support |
Support |
Support |
|